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IRFD9110
Data Sheet January 2002
0.7A, 100V, 1.200 Ohm, P-Channel Power MOSFET
This P-Channel enhancement mode silicon gate power field effect transistor is an advanced power MOSFET designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly developmental type TA17541.
Features
* 0.7A, 100V * rDS(ON) = 1.200 * Single Pulse Avalanche Energy Rated * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance
Symbol
D
Ordering Information
PART NUMBER IRFD9110 PACKAGE HEXDIP BRAND IRFD9110
G
S
NOTE: When ordering, use the entire part number.
Packaging
HEXDIP
DRAIN GATE SOURCE
(c)2002 Fairchild Semiconductor Corporation
IRFD9110 Rev. B
IRFD9110
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified IRFD9110 -100 -100 -0.7 -3.0 20 1.0 0.008 190 -55 to 150 300 260 UNITS V V A A V W W/oC mJ oC oC oC
Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation (Figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Dissipation Derating Factor (Figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. TJ = 25oC to 125oC.
Electrical Specifications
PARAMETER Drain to Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current
TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS ID(ON) IGSS rDS(ON) gfs td(ON) tr td(OFF) tf Qg(TOT) Qgs Qgd CISS COSS CRSS LD Measured From the Drain Lead, 2mm (0.08in) From Package to Center of Die Measured From the Source Lead, 2mm (0.08in) From Header to Source Bonding Pad Modified MOSFET Symbol Showing the Internal Devices Inductances
D LD G LS S
TEST CONDITIONS ID = -250A, VGS = 0V, (Figure 9) VGS = VDS, ID = -250A VDS = Rated BVDSS, VGS = 0V VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC VDS > ID(ON) x rDS(ON)MAX, VGS = -10V, (Figure 6) VGS = 20V ID = -0.3A, VGS = -10V, (Figures 8) VDS 50V, ID = -0.6A, (Figure 11) VDD = 0.5 x Rated BVDSS, ID = -0.7A, RG = 9.1, VGS =-10V, (Figures 16, 17), RL = 70 for VDSS = 50V RL = 56 for VDSS = 40V MOSFET Switching Times are Essentially Independent of Operating Temperature VGS = -10V, ID = -0.7A, VDS = 0.8V x Rated BVDSS, (Figures 13, 18, 19) Gate Charge is Essentially Independent of Operating Temperature VDS = -25V, VGS = 0V, f = 1MHz, (Figure 10)
MIN -100 -2 -0.7 0.59 -
TYP 1.000 0.88 15 30 20 20 11 5.7 5.3 180 85 30 4.0
MAX -4 -25 -250 100 1.200 30 60 40 40 15 -
UNITS V V A A A nA S ns ns ns ns nC nC nC pF pF pF nH
On-State Drain Current (Note 2) Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) Gate to Source Charge Gate to Drain "Miller" Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Internal Drain Inductance
Internal Source Inductance
LS
-
6.0
-
nH
Thermal Resistance Junction to Ambient
(c)2002 Fairchild Semiconductor Corporation
RJA
Typical Socket Mount
-
-
120
oC/W
IRFD9110 Rev. B
IRFD9110
Source to Drain Diode Specifications
PARAMETER Continuous Source to Drain Current Pulse Source to Drain Current (Note 3) SYMBOL ISD ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode
G D
MIN -
TYP -
MAX -0.7 -3.0
UNITS A A
S
Source to Drain Diode Voltage (Note 2) Reverse Recovery Time Reverse Recovery Charge6466 NOTES:
VSD trr QRR
TJ = 25oC, ISD = -0.7A, VGS = 0V, (Figure 12) TJ = 150oC, ISD = -0.7A, dISD/dt = 100A/s TJ = 150oC, ISD = -0.7A, dISD/dt = 100A/s
-
120 6.0
-1.5 -
V ns C
2. Pulse test: pulse width 300s, duty cycle 2%. 3. VDD = 25V, starting TJ = 25oC, L = 582mH, RG = 25, peak IAS = 0.7A. See Figures 14, 15.
Typical Performance Curves
1.2 POWER DISSIPATION MULTIPLIER 1.0 0.8
Unless Otherwise Specified
-1.0
ID, DRAIN CURRENT (A) 0 25 50 75 100 125 TA , AMBIENT TEMPERATURE (oC) 150
-0.8
-0.6
0.6 0.4
-0.4
0.2 0.0
-0.2
0 25 125 50 75 100 TA , AMBIENT TEMPERATURE (oC) 150
FIGURE 1. NORMALIZED POWER DISSIPATION vs AMBIENT TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs AMBIENT TEMPERATURE
-5 10s ID, DRAIN CURRENT (A) 1 100s 1ms -4 ID, DRAIN CURRENT (A) VGS = -10V VGS = -9V PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX
10ms 0.1 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) TC = 25oC TJ = MAX RATED 100ms
-3
VGS = -8V
-2
VGS = -7V VGS = -6V VGS = -5V
-1
0.01 1
DC 0 10 100 0
VDS, DRAIN TO SOURCE VOLTAGE (V)
-10 -20 -30 -40 VDS, DRAIN TO SOURCE VOLTAGE (V)
-50
FIGURE 3. FORWARD BIAS SAFE OPERATING AREA
FIGURE 4. OUTPUT CHARACTERISTICS
(c)2002 Fairchild Semiconductor Corporation
IRFD9110 Rev. B
IRFD9110 Typical Performance Curves
-5 ID(ON), ON-STATE DRAIN CURRENT (A) PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX ID, DRAIN CURRENT (A) -4 VGS = -10V VGS = -9V
Unless Otherwise Specified (Continued)
-12.0 VDS > ID(ON) x rDS(ON) PULSE DURATION = 80s -9.6 DUTY CYCLE = 0.5% MAX
-3
VGS = -8V
-7.2 TJ = 125oC -4.8 TJ = 25oC TJ = -55oC -2.4
-2
VGS = -7V VGS = -6V VGS = -5V
-1
0 0 -2 -4 -6 -8 -10 VDS, DRAIN TO SOURCE VOLTAGE (V)
0
0
-2
-4
-6
-8
-10
VGS, GATE TO SOURCE VOLTAGE (V)
FIGURE 5. SATURATION CHARACTERISTICS
5 2s PULSE TEST 4 NORMALIZED DRAIN TO SOURCE ON RESISTANCE 2.5
FIGURE 6. TRANSFER CHARACTERISTICS
DRAIN TO SOURCE ON RESISTANCE ()
VGS = -10V, ID = -0.3A PULSE DURATION = 80s 2.0 DUTY CYCLE = 0.5% MAX
3
1.5
2
VGS = -10V VGS = -20V
1.0
1
0.5
0
0
-1
-2
-3
0 -40
ID, DRAIN CURRENT (A)
0 40 80 120 TJ , JUNCTION TEMPERATURE (oC)
160
NOTE: Heating effect of 2s is minimal. FIGURE 7. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT FIGURE 8. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
1.25 ID = 250A NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1.15 C, CAPACITANCE (pF)
500 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGD
400
1.05
300 CISS 200
0.95
0.85
100
COSS CRSS
0.75 -40
0
40
80
120
160
0
0
-10
TJ , JUNCTION TEMPERATURE (oC)
-30 -40 -20 VDS, DRAIN TO SOURCE VOLTAGE (V)
-50
FIGURE 9. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 10. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
(c)2002 Fairchild Semiconductor Corporation
IRFD9110 Rev. B
IRFD9110 Typical Performance Curves
2.5 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX
Unless Otherwise Specified (Continued)
-100 TJ = -55oC ISD, DRAIN CURRENT (A) PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX
gfs, TRANSCONDUCTANCE (S)
2.0
TJ = 25oC TJ = 125oC
-10 TJ = 150oC
1.5
1.0
-1.0
TJ = 25oC
0.5
0 0 -1.2 -2.4 -3.6 -4.8 -6.0 ID , DRAIN CURRENT (A)
-0.1 -0.4 -0.6 -0.8 -1.4 -1.0 -1.2 -1.6 VSD, SOURCE TO DRAIN VOLTAGE (V) -1.8
FIGURE 11. TRANSCONDUCTANCE vs DRAIN CURRENT
FIGURE 12. SOURCE TO DRAIN DIODE VOLTAGE
5
ID = -0.7A
VGS, GATE TO SOURCE (V)
0
-5
-10
VDS = -20V VDS = -50V VDS = -80V
-15
-20 0 2 4 6 8 Qg(TOT) , TOTAL GATE CHARGE (nC) 10
FIGURE 13. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Test Circuits and Waveforms
VDS tAV L VARY tP TO OBTAIN REQUIRED PEAK IAS RG 0
+
VDD VDD
0V VGS
DUT tP IAS 0.01
IAS tP BVDSS VDS
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
(c)2002 Fairchild Semiconductor Corporation
IRFD9110 Rev. B
IRFD9110 Test Circuits and Waveforms
(Continued)
tON td(ON) tr RL 0 10%
tOFF td(OFF) tf 10%
DUT VGS RG
VDD
+
VDS VGS 0
90%
90%
10% 50% PULSE WIDTH 90% 50%
FIGURE 16. SWITCHING TIME TEST CIRCUIT
FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
CURRENT REGULATOR
-VDS (ISOLATED SUPPLY)
0 VDS
DUT 12V BATTERY 0.2F 50k 0.3F Qgs D G 0 IG(REF) IG CURRENT SAMPLING RESISTOR S +VDS ID CURRENT SAMPLING RESISTOR 0 DUT VDD Qgd
VGS
Qg(TOT)
IG(REF)
FIGURE 18. GATE CHARGE TEST CIRCUIT
FIGURE 19. GATE CHARGE WAVEFORMS
(c)2002 Fairchild Semiconductor Corporation
IRFD9110 Rev. B
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM
DISCLAIMER
FAST (R) FASTrTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MicroPakTM MICROWIRETM
OPTOLOGICTM OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench (R) QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER (R)
SMART STARTTM STAR*POWERTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM TruTranslationTM UHCTM UltraFET (R)
VCXTM
STAR*POWER is used under license
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. H4

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